Homework 4
(Due Wednesday 11/25/2003 4:00pm electronic submission; hard copy due to the TAs)

Due to a typographical error, we put in Wednesday, instead of Tuesday, as 11/25 is a Tuesday.  However, due to this error, we will accept till Wednesday 11/26 till 4pm.  You may drop off the had copy under my door, if you cannot find the TAs.  I expect some of the TAs to be around.

Design and layout the following cells using complementary pass transistor logic. Show the simulations using spectre.

NAND-AND
NOR-OR
XNOR-XOR