It is assumed
that the following course material is being made available to
students of SUNY at
They are meant for instructional use only.
|
Date |
Topic |
|
Notes/comments |
|
1/18 |
Introduction to CSE241: Policies and
protocols |
First day handout |
|
| 1/20 |
Foundations of Digital Systems: number systems: decimal, binary, any radix, radix conversion, sig-mag representation, 1's, 2's complement, binary arithmetic: addition, subtraction: sig-mag and 2's complement arithemetic | Ch.1 |
Hwk1 assigned |
| 1/23 | Signed arithmetic: integer representation and operations | Ch.1 | |
| 1/25 | Signed arithmetic contd. Logic gates | Ch.1 | Hwk2 assigned (not yet) |
| 1/27 | Logic gates; Boolean algebra |
Ch.2 |
Hwk 2 assigned |
| 1/30 |
Algebraic simplification |
Ch.2 |
|
| 2/1-2/3 |
Karnaugh-map simplification |
Ch.2 |
|
| 2/6 |
Problems solving using
K-map: word problem->Truth table->K-map->Digital
gate implementation; |
Ch.2 |
7-segment LED display |
| 2/10 |
SSI, MSI; Decoders,
Multiplexers |
Ch.2 |
|
| 2/20,22 |
Sequential circuits:
Flip-flops: Sr, JK, D, T: characteristic table and
excitation table |
Ch.3 |
|
| 2/27 | Excitation tables for FFs; Vending machine coin counter | Ch.3; 3.23 | |
| 2/29 | Review for midterm exam | Ch. 1, 2 and part of Ch.3 | |
| 3/7 |
Midterm Exam |
||
| 3/12-16 | Spring Break | ||
| 3/19 | Seqeuntial circuit analysis; Moore and Meally machines | Examples | |
| 3/26 | Verilog Description Language | verilog | |
| 4/11 | Floating point representation: IEEE 754 format | Ch.5, 5.3.2 | |
| 4/16,18 |
MIPS assembly lanaguage
programming |
Ch.6 ISA |
|
| 4/20 |
Final Exam Review |
Review |
Each home is graded for 20 points.
| Homework#, Chapter |
Due date |
Topic |
| 1, Chapter 1: 1.11d, 1.13d,
1.15d, 1.19e, 1.24d |
2/3/2012 |
Number systems |
| 2. Chapter 1: 1.34, 1.36 b,
f; 1.42; 1.48; 1.51 |
2/10/2012 |
Logic gates |
| 3. Chapter 2: 2.1c, 2.7b, 2.19, 2.22, 2.24, | 2/20/2012 | Simplification: algebraic and K-map |
| 4. 2.23 (7-seg to LED: all functions), 2.32, 2.30a, 2.30b | 2/27/2012 | Digital circuit applications; MUX |
| 5: Provide the characteristic table, and excitation tables for SR, D, JK and T flipflops | 3/2/2012 | Flip-flops |
| 6: 3.16, 3.20, 3.24, 3.28 | 3/21/2012 | FSM design, implementation and analysis |
| 7: Sequential circuit design and analysis | 4/2/2012 | See this file |
| 8: MSI circuit design | 4/9/2012 | See this file |
| 9: Verilog Synthesis | 4/16/2012 | 4.25, 4.30, 4.35, 4.40 |
| 10: Floating point representation (IEEE 754 Format: 32
bits) + MPIS assembly language |
4/27/2012 | 5.26 b, 5.26 c; Write a MIPS program to compute factorial N: Assemble + execute, submit source code |