Pads named Padnc are Pad spacer with no connection to the Bonding Pad,
there is no
connection to the external pin. Padvdd and Padgnd are used
for Power and Ground
respectively.
Library : AMI_PADS
Cell : min_frame
View: layout_nodrc.
ii) Instantiate the top level cell of your design . Create
Pins in Metal3 over the Pads in the Pad frame(as shown in the figure).
Make the required connections from the pins in the Pads to the Pins of
your design.
iii) Do verify DRC and correct any errors in the design. Once you
have made sure that there are no DRC
errors in the design, replace the layout_nodrc view with the layout view
of min_frame.
This can be done by selecting the min_frame(i.e. left click on the
min_frame and you will see a
white box over the min_frame , indicating that it has been selected) and
pressing 'q'. This will bring
up the Edit->Properties form in which change the name of the view name
to "layout". Then press
ok in the form for the change to take effect.
Run the DRC again , to check for any errors created during the Metal3 pin
creation and while making
the connection to pins of the Pads(during step ii). When DRC is run
in Step (iii), the Pads are not checked
as the layer nodrc is present over the Pads. If you had introduced
any errors during step (ii) they would not
be detected with the layout_nodrc view. Once the layout_nodrc is replaced
with the layout view, DRC is
done over the Pads too. At this stage you should have 2093 errors in your
design. If there are more
errors, you need to look at the changes made during step (ii) and correct
them.
Padio and
Padaref have their pins at a similar location in the Pads. Padout's pin
is shown in the figure below by the ruler in the
Pad.
It is the second pin from Left when the Pad is at the top. This pin
is in Metal2 , use metal2 for connecting to this pin.
Padvdd and Padgnd have
their pins in Metal1 at a location similar to Padinc. Use wider width to
route vdd and gnd .